| /petsc/lib/petsc/bin/maint/petsclinter/petsclinter/classes/ |
| H A D | _attr_cache.py | 14 …An attribute cache (i.e. a `dict`) to enable lazy-evaluated default values. See the `_get_cached()` 27 an existing dict to seed the cache with, or none to start fresh 49 a function to produce a default value in case `attr` is not in the cache 62 … If `attr` does not exist in the cache, this routine inserts the result of `func(*args, **kwargs)` 63 into the cache. 70 the dict (i.e. cache). This is OK if your default value is trivial, but what if producing it is 76 cache = self._cache 77 if attr in cache: 78 return TYPE_CAST(_T, cache[attr]) 79 ret = cache[attr] = func(*args, **kwargs)
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| H A D | _src_pos.py | 21 every time you access a tu's file. So we cache them here 63 # offset is __by_far__ the most accessed attribute so we cache it in a slot, normally 138 It is for whatever reason stupidly expensive to create these as clang does not cache them. So 139 this acts as a cache
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| /petsc/lib/petsc/bin/maint/abi-compliance-checker/modules/Internals/ |
| H A D | TypeAttr.pm | 25 my %Cache; 68 if(defined $Cache{"goToFirst"}{$TypeId}{$LVer}{$Type_Type}) { 69 return %{$Cache{"goToFirst"}{$TypeId}{$LVer}{$Type_Type}}; 85 $Cache{"goToFirst"}{$TypeId}{$LVer}{$Type_Type} = \%Type; 95 if(defined $Cache{"getPureType"}{$TypeId}{$LVer}) { 96 return %{$Cache{"getPureType"}{$TypeId}{$LVer}}; 105 $Cache{"getPureType"}{$TypeId}{$LVer} = \%Type; 113 if(defined $Cache{"getPLevel"}{$TypeId}{$LVer}) { 114 return $Cache{"getPLevel"}{$TypeId}{$LVer}; 131 $Cache{"getPLevel"}{$TypeId}{$LVer} = $PLevel; [all …]
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| H A D | Utils.pm | 25 my %Cache; 348 if(defined $Cache{"uncoverTypedefs"}{$LVer}{$TypeName}) { 349 return $Cache{"uncoverTypedefs"}{$LVer}{$TypeName}; 390 return ($Cache{"uncoverTypedefs"}{$LVer}{$TypeName} = $TypeName_New); 454 if(defined $Cache{"checkGcc"}{$Gcc}{$Req}) { 455 return $Cache{"checkGcc"}{$Gcc}{$Req}; 461 return ($Cache{"checkGcc"}{$Gcc}{$Req} = $Gcc); 464 return ($Cache{"checkGcc"}{$Gcc}{$Req} = ""); 471 if($Cache{"dumpVersion"}{$Cmd}) { 472 return $Cache{"dumpVersion"}{$Cmd}; [all …]
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| H A D | ElfTools.pm | 25 my %Cache; 90 if(defined $Cache{"getSONAME"}{$Path}) { 91 return $Cache{"getSONAME"}{$Path}; 108 return ($Cache{"getSONAME"}{$Path} = $1); 111 return ($Cache{"getSONAME"}{$Path}=""); 225 if(defined $Cache{"getArch_GCC"}{$LVer}) { 226 return $Cache{"getArch_GCC"}{$LVer}; 283 return ($Cache{"getArch_GCC"}{$LVer} = $Arch);
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| H A D | SysFiles.pm | 27 my %Cache; 275 if(defined $Cache{"getCmdPath"}{$Name}) { 276 return $Cache{"getCmdPath"}{$Name}; 317 return ($Cache{"getCmdPath"}{$Name} = $Path); 324 if(defined $Cache{"searchCommand"}{$Name}) { 325 return $Cache{"searchCommand"}{$Name}; 328 return ($Cache{"searchCommand"}{$Name} = $DefaultPath); 338 return ($Cache{"searchCommand"}{$Name} = $CmdPath); 341 return ($Cache{"searchCommand"}{$Name} = ""); 346 if(defined $Cache{"getCmdPath_Default"}{$_[0]}) { [all …]
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| H A D | Basic.pm | 27 my %Cache; 89 if(defined $Cache{"getFilename"}{$_[0]}) { 90 return $Cache{"getFilename"}{$_[0]}; 93 return ($Cache{"getFilename"}{$_[0]}=$1); 95 return ($Cache{"getFilename"}{$_[0]}=""); 100 if(defined $Cache{"getDirname"}{$_[0]}) { 101 return $Cache{"getDirname"}{$_[0]}; 104 return ($Cache{"getDirname"}{$_[0]}=$1); 106 return ($Cache{"getDirname"}{$_[0]}=""); 265 if(defined $Cache{"getDepth"}{$_[0]}) { [all …]
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| H A D | Mangling.pm | 25 my %Cache; 135 if($Cache{"mangleSymbol"}{$LVer}{$InfoId}{$Compiler}) { 136 return $Cache{"mangleSymbol"}{$LVer}{$InfoId}{$Compiler}; 145 return ($Cache{"mangleSymbol"}{$LVer}{$InfoId}{$Compiler} = $Mangled); 944 if($Cache{"modelUnmangled"}{$LVer}{$Compiler}{$InfoId}) { 945 return $Cache{"modelUnmangled"}{$LVer}{$Compiler}{$InfoId}; 1030 return ($Cache{"modelUnmangled"}{$LVer}{$Compiler}{$InfoId} = formatName($PureSignature, "S"));
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| H A D | Filter.pm | 25 my %Cache; 432 if(defined $Cache{"skipHeader"}{$LVer}{$Path}) { 433 return $Cache{"skipHeader"}{$LVer}{$Path}; 440 return ($Cache{"skipHeader"}{$LVer}{$Path} = 1); 446 return ($Cache{"skipHeader"}{$LVer}{$Path} = skipHeader_I(@_));
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| /petsc/src/sys/yaml/src/ |
| H A D | scanner.c | 486 #define CACHE(parser,length) \ macro 861 if (!CACHE(parser, 1)) in yaml_parser_fetch_next_token() 889 if (!CACHE(parser, 4)) in yaml_parser_fetch_next_token() 1924 if (!CACHE(parser, 1)) return 0; in yaml_parser_scan_to_next_token() 1939 if (!CACHE(parser, 1)) return 0; in yaml_parser_scan_to_next_token() 1945 if (!CACHE(parser, 1)) return 0; in yaml_parser_scan_to_next_token() 1953 if (!CACHE(parser, 1)) return 0; in yaml_parser_scan_to_next_token() 1961 if (!CACHE(parser, 2)) return 0; in yaml_parser_scan_to_next_token() 2055 if (!CACHE(parser, 1)) goto error; in yaml_parser_scan_directive() 2059 if (!CACHE(parser, 1)) goto error; in yaml_parser_scan_directive() [all …]
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| /petsc/src/ksp/ksp/utils/lmvm/tests/output/ |
| H A D | solve_performance_0.out | 10 Cache J0 products: true 11 Cache gradient products: true
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| /petsc/doc/manual/ |
| H A D | performance.md | 108 exchange as well as cache coherency. Because main memory on modern 135 is already in use (either allocated or as IO cache), memory available 194 common L2 cache. IDs 0, 12, 1, 13, 2, 14, 3, 15, 4, 16, 5, 17 share the 195 same socket and have a common L3 cache. 323 channels. Increasingly complex processor designs and cache hierarchies, 327 to such placement decisions, because one L3 cache is shared by all cores 333 cores that share the same L2 cache may benefit performance if the two 335 between cores sharing an L2 cache may be roughly half that of two cores 337 ranks on cores that do not share an L2 cache, because (if there are 338 fewer MPI ranks than cores) this increases the total L2 cache capacity [all …]
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| /petsc/doc/developers/ |
| H A D | matrices.md | 16 most processors have at least three levels of memory: registers, cache, 22 cache and from there move it into registers and use it repeatedly while 23 it remains in the cache or registers before returning it to main memory. 31 hardware controls the use of the cache. Since the user has essentially 33 and hardware cache system can perform well. Good-quality code is then
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| /petsc/config/BuildSystem/config/utilities/ |
| H A D | cacheDetails.py | 30 'level1-dcache-linesize','int','Size in bytes of each line of the Level 1 data cache', 35 … CacheAttribute('level1-dcache-size', 'int', 'Size in bytes of Level 1 data cache', 32768, 16), 36 …ttribute('level1-dcache-assoc', 'int', 'Associativity of the Level 1 data cache, 0 for full associ…
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| /petsc/src/vec/vec/tutorials/ |
| H A D | performance.c | 29 /* create dummy vector to clear cache */ in main() 43 PetscCall(VecNorm(x, NORM_1, &norm1)); /* clear cache */ in main()
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| /petsc/src/ksp/pc/impls/spai/ |
| H A D | ispai.c | 50 int cache_size; /* one of (1,2,3,4,5,6) indicting size of cache */ 86 …/* int cache_size */ /* one of (1,2,3,4,5,6) indicting size of cache. cache_size == 0 indicates… in PCSetUp_SPAI() 363 PCSPAISetCacheSize - specify cache size in the `PCSPAI` preconditioner 367 - cache_size - cache size {0,1,2,3,4,5} (default 5) 372 `PCSPAI` uses a hash table to cache messages and avoid 472 . -pc_spai_cache_size <n> - set cache size
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| /petsc/doc/install/ |
| H A D | multibuild.md | 67 change. Hence `configure` can safely cache and reuse these values in subsequent 84 Keep in mind however that this will only disable `configure`'s cache, not any other
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| /petsc/config/PETSc/options/ |
| H A D | memAlign.py | 30 …# Intel/AMD cache lines are 64 bytes, default page sizes are usually 4kB. It would be pretty silly…
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| /petsc/include/petsc/private/ |
| H A D | pcbjkokkosimpl.h | 41 …PetscInt n; // cache host version of d_bid_eqOffset…
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| H A D | pcgamgimpl.h | 44 PetscReal *orig_data; /* cache data */
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| /petsc/config/BuildSystem/ |
| H A D | script.py | 273 cache = argDB['configureCache'] 274 framework = pickle.loads(cache) 277 self.logPrint('Loaded configure to cache: size '+str(len(cache)))
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| /petsc/src/ksp/ksp/utils/lmvm/ |
| H A D | lmbasis.h | 23 …Vec cached_product; // Some methods will cache v <- S^T g during MatLMVMUpdate(B…
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| H A D | lmvmimpl.c | 332 …PetscCall(PetscViewerASCIIPrintf(pv, "Cache J0 products: %s\n", lmvm->do_not_cache_J0_products ? "… in MatView_LMVM() 333 …PetscCall(PetscViewerASCIIPrintf(pv, "Cache gradient products: %s\n", lmvm->cache_gradient_product… in MatView_LMVM() 372 …PetscCall(PetscOptionsBool("-mat_lmvm_cache_J0_products", "Cache applications of the kernel J0 or … in MatSetFromOptions_LMVM() 373 …PetscCall(PetscOptionsBool("-mat_lmvm_cache_gradient_products", "Cache data used to apply the inve… in MatSetFromOptions_LMVM()
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| /petsc/include/ |
| H A D | petscmatcoarsen.h | 55 Mat mat; /* cache a Mat for communication data */
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| /petsc/src/sys/classes/viewer/impls/vu/ |
| H A D | petscvu.c | 244 PetscViewerVUPrintDeferred - Prints to the deferred write cache instead of the file. 282 PetscViewerVUFlushDeferred - Flushes the deferred write cache to the file.
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