1 // SPDX-License-Identifier: GPL-2.0
2 /*
3 * Analog Devices AD7466/7/8 AD7476/5/7/8 (A) SPI ADC driver
4 * TI ADC081S/ADC101S/ADC121S 8/10/12-bit SPI ADC driver
5 *
6 * Copyright 2010 Analog Devices Inc.
7 */
8
9 #include <linux/bitops.h>
10 #include <linux/device.h>
11 #include <linux/kernel.h>
12 #include <linux/slab.h>
13 #include <linux/sysfs.h>
14 #include <linux/spi/spi.h>
15 #include <linux/regulator/consumer.h>
16 #include <linux/gpio/consumer.h>
17 #include <linux/err.h>
18 #include <linux/module.h>
19 #include <linux/delay.h>
20
21 #include <linux/iio/iio.h>
22 #include <linux/iio/sysfs.h>
23 #include <linux/iio/buffer.h>
24 #include <linux/iio/trigger_consumer.h>
25 #include <linux/iio/triggered_buffer.h>
26
27 struct ad7476_state;
28
29 struct ad7476_chip_info {
30 unsigned int int_vref_mv;
31 struct iio_chan_spec channel[2];
32 void (*reset)(struct ad7476_state *);
33 void (*conversion_pre_op)(struct ad7476_state *st);
34 void (*conversion_post_op)(struct ad7476_state *st);
35 bool has_vref;
36 bool has_vdrive;
37 bool convstart_required;
38 };
39
40 struct ad7476_state {
41 struct spi_device *spi;
42 const struct ad7476_chip_info *chip_info;
43 struct gpio_desc *convst_gpio;
44 struct spi_transfer xfer;
45 struct spi_message msg;
46 struct iio_chan_spec channel[2];
47 int scale_mv;
48 /*
49 * DMA (thus cache coherency maintenance) may require the
50 * transfer buffers to live in their own cache lines.
51 * Make the buffer large enough for one 16 bit sample and one 64 bit
52 * aligned 64 bit timestamp.
53 */
54 unsigned char data[ALIGN(2, sizeof(s64)) + sizeof(s64)] __aligned(IIO_DMA_MINALIGN);
55 };
56
ad7091_convst(struct ad7476_state * st)57 static void ad7091_convst(struct ad7476_state *st)
58 {
59 if (!st->convst_gpio)
60 return;
61
62 gpiod_set_value_cansleep(st->convst_gpio, 0);
63 udelay(1); /* CONVST pulse width: 10 ns min */
64 gpiod_set_value_cansleep(st->convst_gpio, 1);
65 udelay(1); /* Conversion time: 650 ns max */
66 }
67
bd79105_convst_disable(struct ad7476_state * st)68 static void bd79105_convst_disable(struct ad7476_state *st)
69 {
70 gpiod_set_value_cansleep(st->convst_gpio, 0);
71 }
72
bd79105_convst_enable(struct ad7476_state * st)73 static void bd79105_convst_enable(struct ad7476_state *st)
74 {
75 gpiod_set_value_cansleep(st->convst_gpio, 1);
76 /* Worst case, 2790 ns required for conversion */
77 ndelay(2790);
78 }
79
ad7476_trigger_handler(int irq,void * p)80 static irqreturn_t ad7476_trigger_handler(int irq, void *p)
81 {
82 struct iio_poll_func *pf = p;
83 struct iio_dev *indio_dev = pf->indio_dev;
84 struct ad7476_state *st = iio_priv(indio_dev);
85 int b_sent;
86
87 if (st->chip_info->conversion_pre_op)
88 st->chip_info->conversion_pre_op(st);
89
90 b_sent = spi_sync(st->spi, &st->msg);
91 if (b_sent < 0)
92 goto done;
93
94 iio_push_to_buffers_with_ts(indio_dev, st->data, sizeof(st->data),
95 iio_get_time_ns(indio_dev));
96 done:
97 if (st->chip_info->conversion_post_op)
98 st->chip_info->conversion_post_op(st);
99 iio_trigger_notify_done(indio_dev->trig);
100
101 return IRQ_HANDLED;
102 }
103
ad7091_reset(struct ad7476_state * st)104 static void ad7091_reset(struct ad7476_state *st)
105 {
106 /* Any transfers with 8 scl cycles will reset the device */
107 spi_read(st->spi, st->data, 1);
108 }
109
ad7476_scan_direct(struct ad7476_state * st)110 static int ad7476_scan_direct(struct ad7476_state *st)
111 {
112 int ret;
113
114 if (st->chip_info->conversion_pre_op)
115 st->chip_info->conversion_pre_op(st);
116
117 ret = spi_sync(st->spi, &st->msg);
118 if (ret)
119 return ret;
120
121 if (st->chip_info->conversion_post_op)
122 st->chip_info->conversion_post_op(st);
123
124 return be16_to_cpup((__be16 *)st->data);
125 }
126
ad7476_read_raw(struct iio_dev * indio_dev,struct iio_chan_spec const * chan,int * val,int * val2,long m)127 static int ad7476_read_raw(struct iio_dev *indio_dev,
128 struct iio_chan_spec const *chan,
129 int *val,
130 int *val2,
131 long m)
132 {
133 int ret;
134 struct ad7476_state *st = iio_priv(indio_dev);
135
136 switch (m) {
137 case IIO_CHAN_INFO_RAW:
138 if (!iio_device_claim_direct(indio_dev))
139 return -EBUSY;
140 ret = ad7476_scan_direct(st);
141 iio_device_release_direct(indio_dev);
142
143 if (ret < 0)
144 return ret;
145 *val = (ret >> chan->scan_type.shift) &
146 GENMASK(chan->scan_type.realbits - 1, 0);
147 return IIO_VAL_INT;
148 case IIO_CHAN_INFO_SCALE:
149 *val = st->scale_mv;
150 *val2 = chan->scan_type.realbits;
151 return IIO_VAL_FRACTIONAL_LOG2;
152 }
153 return -EINVAL;
154 }
155
156 #define _AD7476_CHAN(bits, _shift, _info_mask_sep) \
157 { \
158 .type = IIO_VOLTAGE, \
159 .indexed = 1, \
160 .info_mask_separate = _info_mask_sep, \
161 .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE), \
162 .scan_type = { \
163 .sign = 'u', \
164 .realbits = (bits), \
165 .storagebits = 16, \
166 .shift = (_shift), \
167 .endianness = IIO_BE, \
168 }, \
169 }
170
171 #define ADC081S_CHAN(bits) _AD7476_CHAN((bits), 12 - (bits), \
172 BIT(IIO_CHAN_INFO_RAW))
173 #define AD7476_CHAN(bits) _AD7476_CHAN((bits), 13 - (bits), \
174 BIT(IIO_CHAN_INFO_RAW))
175 #define AD7940_CHAN(bits) _AD7476_CHAN((bits), 15 - (bits), \
176 BIT(IIO_CHAN_INFO_RAW))
177 #define AD7091R_CHAN(bits) _AD7476_CHAN((bits), 16 - (bits), 0)
178 #define ADS786X_CHAN(bits) _AD7476_CHAN((bits), 12 - (bits), \
179 BIT(IIO_CHAN_INFO_RAW))
180
181 static const struct ad7476_chip_info ad7091_chip_info = {
182 .channel[0] = AD7091R_CHAN(12),
183 .channel[1] = IIO_CHAN_SOFT_TIMESTAMP(1),
184 .conversion_pre_op = ad7091_convst,
185 .reset = ad7091_reset,
186 };
187
188 static const struct ad7476_chip_info ad7091r_chip_info = {
189 .channel[0] = AD7091R_CHAN(12),
190 .channel[1] = IIO_CHAN_SOFT_TIMESTAMP(1),
191 .conversion_pre_op = ad7091_convst,
192 .int_vref_mv = 2500,
193 .has_vref = true,
194 .reset = ad7091_reset,
195 };
196
197 static const struct ad7476_chip_info ad7273_chip_info = {
198 .channel[0] = AD7940_CHAN(10),
199 .channel[1] = IIO_CHAN_SOFT_TIMESTAMP(1),
200 .has_vref = true,
201 };
202
203 static const struct ad7476_chip_info ad7274_chip_info = {
204 .channel[0] = AD7940_CHAN(12),
205 .channel[1] = IIO_CHAN_SOFT_TIMESTAMP(1),
206 .has_vref = true,
207 };
208
209 static const struct ad7476_chip_info ad7276_chip_info = {
210 .channel[0] = AD7940_CHAN(12),
211 .channel[1] = IIO_CHAN_SOFT_TIMESTAMP(1),
212 };
213
214 static const struct ad7476_chip_info ad7277_chip_info = {
215 .channel[0] = AD7940_CHAN(10),
216 .channel[1] = IIO_CHAN_SOFT_TIMESTAMP(1),
217 };
218
219 static const struct ad7476_chip_info ad7278_chip_info = {
220 .channel[0] = AD7940_CHAN(8),
221 .channel[1] = IIO_CHAN_SOFT_TIMESTAMP(1),
222 };
223
224 static const struct ad7476_chip_info ad7466_chip_info = {
225 .channel[0] = AD7476_CHAN(12),
226 .channel[1] = IIO_CHAN_SOFT_TIMESTAMP(1),
227 };
228
229 static const struct ad7476_chip_info ad7467_chip_info = {
230 .channel[0] = AD7476_CHAN(10),
231 .channel[1] = IIO_CHAN_SOFT_TIMESTAMP(1),
232 };
233
234 static const struct ad7476_chip_info ad7468_chip_info = {
235 .channel[0] = AD7476_CHAN(8),
236 .channel[1] = IIO_CHAN_SOFT_TIMESTAMP(1),
237 };
238
239 static const struct ad7476_chip_info ad7475_chip_info = {
240 .channel[0] = AD7476_CHAN(12),
241 .channel[1] = IIO_CHAN_SOFT_TIMESTAMP(1),
242 .has_vref = true,
243 .has_vdrive = true,
244 };
245
246 static const struct ad7476_chip_info ad7495_chip_info = {
247 .channel[0] = AD7476_CHAN(12),
248 .channel[1] = IIO_CHAN_SOFT_TIMESTAMP(1),
249 .int_vref_mv = 2500,
250 .has_vdrive = true,
251 };
252
253 static const struct ad7476_chip_info ad7940_chip_info = {
254 .channel[0] = AD7940_CHAN(14),
255 .channel[1] = IIO_CHAN_SOFT_TIMESTAMP(1),
256 };
257
258 static const struct ad7476_chip_info adc081s_chip_info = {
259 .channel[0] = ADC081S_CHAN(8),
260 .channel[1] = IIO_CHAN_SOFT_TIMESTAMP(1),
261 };
262
263 static const struct ad7476_chip_info adc101s_chip_info = {
264 .channel[0] = ADC081S_CHAN(10),
265 .channel[1] = IIO_CHAN_SOFT_TIMESTAMP(1),
266 };
267
268 static const struct ad7476_chip_info adc121s_chip_info = {
269 .channel[0] = ADC081S_CHAN(12),
270 .channel[1] = IIO_CHAN_SOFT_TIMESTAMP(1),
271 };
272
273 static const struct ad7476_chip_info ads7866_chip_info = {
274 .channel[0] = ADS786X_CHAN(12),
275 .channel[1] = IIO_CHAN_SOFT_TIMESTAMP(1),
276 };
277
278 static const struct ad7476_chip_info ads7867_chip_info = {
279 .channel[0] = ADS786X_CHAN(10),
280 .channel[1] = IIO_CHAN_SOFT_TIMESTAMP(1),
281 };
282
283 static const struct ad7476_chip_info ads7868_chip_info = {
284 .channel[0] = ADS786X_CHAN(8),
285 .channel[1] = IIO_CHAN_SOFT_TIMESTAMP(1),
286 };
287
288 static const struct ad7476_chip_info ltc2314_14_chip_info = {
289 .channel[0] = AD7940_CHAN(14),
290 .channel[1] = IIO_CHAN_SOFT_TIMESTAMP(1),
291 .has_vref = true,
292 };
293
294 static const struct ad7476_chip_info bd79105_chip_info = {
295 .channel[0] = AD7091R_CHAN(16),
296 .channel[1] = IIO_CHAN_SOFT_TIMESTAMP(1),
297 /*
298 * The BD79105 starts ADC data conversion when the CONVSTART line is
299 * set HIGH. The CONVSTART must be kept HIGH until the data has been
300 * read from the ADC.
301 */
302 .conversion_pre_op = bd79105_convst_enable,
303 .conversion_post_op = bd79105_convst_disable,
304 /* BD79105 won't do conversion without convstart */
305 .convstart_required = true,
306 .has_vref = true,
307 .has_vdrive = true,
308 };
309
310 static const struct iio_info ad7476_info = {
311 .read_raw = &ad7476_read_raw,
312 };
313
ad7476_probe(struct spi_device * spi)314 static int ad7476_probe(struct spi_device *spi)
315 {
316 struct ad7476_state *st;
317 struct iio_dev *indio_dev;
318 unsigned int i;
319 int ret;
320
321 indio_dev = devm_iio_device_alloc(&spi->dev, sizeof(*st));
322 if (!indio_dev)
323 return -ENOMEM;
324
325 st = iio_priv(indio_dev);
326
327 st->chip_info = spi_get_device_match_data(spi);
328 if (!st->chip_info)
329 return -ENODEV;
330
331 /* Use VCC for reference voltage if vref / internal vref aren't used */
332 if (!st->chip_info->int_vref_mv && !st->chip_info->has_vref) {
333 ret = devm_regulator_get_enable_read_voltage(&spi->dev, "vcc");
334 if (ret < 0)
335 return ret;
336 st->scale_mv = ret / 1000;
337 } else {
338 ret = devm_regulator_get_enable(&spi->dev, "vcc");
339 if (ret < 0)
340 return ret;
341 }
342
343 if (st->chip_info->has_vref) {
344 ret = devm_regulator_get_enable_read_voltage(&spi->dev, "vref");
345 if (ret < 0) {
346 /* Vref is optional if a device has an internal reference */
347 if (!st->chip_info->int_vref_mv || ret != -ENODEV)
348 return ret;
349 } else {
350 st->scale_mv = ret / 1000;
351 }
352 }
353
354 if (!st->scale_mv)
355 st->scale_mv = st->chip_info->int_vref_mv;
356
357 if (st->chip_info->has_vdrive) {
358 ret = devm_regulator_get_enable(&spi->dev, "vdrive");
359 if (ret)
360 return ret;
361 }
362
363 st->convst_gpio = devm_gpiod_get_optional(&spi->dev,
364 "adi,conversion-start",
365 GPIOD_OUT_LOW);
366 if (IS_ERR(st->convst_gpio))
367 return PTR_ERR(st->convst_gpio);
368
369 if (st->chip_info->convstart_required && !st->convst_gpio)
370 return dev_err_probe(&spi->dev, -EINVAL, "No convstart GPIO\n");
371
372 /*
373 * This will never happen. Unless someone changes the channel specs
374 * in this driver. And if someone does, without changing the loop
375 * below, then we'd better immediately produce a big fat error, before
376 * the change proceeds from that developer's table.
377 */
378 static_assert(ARRAY_SIZE(st->channel) == ARRAY_SIZE(st->chip_info->channel));
379 for (i = 0; i < ARRAY_SIZE(st->channel); i++) {
380 st->channel[i] = st->chip_info->channel[i];
381 if (st->convst_gpio)
382 __set_bit(IIO_CHAN_INFO_RAW,
383 &st->channel[i].info_mask_separate);
384 }
385
386 st->spi = spi;
387
388 indio_dev->name = spi_get_device_id(spi)->name;
389 indio_dev->modes = INDIO_DIRECT_MODE;
390 indio_dev->channels = st->channel;
391 indio_dev->num_channels = ARRAY_SIZE(st->channel);
392 indio_dev->info = &ad7476_info;
393
394 /* Setup default message */
395
396 st->xfer.rx_buf = &st->data;
397 st->xfer.len = indio_dev->channels[0].scan_type.storagebits / 8;
398
399 spi_message_init(&st->msg);
400 spi_message_add_tail(&st->xfer, &st->msg);
401
402 ret = devm_iio_triggered_buffer_setup(&spi->dev, indio_dev, NULL,
403 &ad7476_trigger_handler, NULL);
404 if (ret)
405 return ret;
406
407 if (st->chip_info->reset)
408 st->chip_info->reset(st);
409
410 return devm_iio_device_register(&spi->dev, indio_dev);
411 }
412
413 static const struct spi_device_id ad7476_id[] = {
414 { "ad7091", (kernel_ulong_t)&ad7091_chip_info },
415 { "ad7091r", (kernel_ulong_t)&ad7091r_chip_info },
416 { "ad7273", (kernel_ulong_t)&ad7273_chip_info },
417 { "ad7274", (kernel_ulong_t)&ad7274_chip_info },
418 { "ad7276", (kernel_ulong_t)&ad7276_chip_info },
419 { "ad7277", (kernel_ulong_t)&ad7277_chip_info },
420 { "ad7278", (kernel_ulong_t)&ad7278_chip_info },
421 { "ad7466", (kernel_ulong_t)&ad7466_chip_info },
422 { "ad7467", (kernel_ulong_t)&ad7467_chip_info },
423 { "ad7468", (kernel_ulong_t)&ad7468_chip_info },
424 { "ad7475", (kernel_ulong_t)&ad7475_chip_info },
425 { "ad7476", (kernel_ulong_t)&ad7466_chip_info },
426 { "ad7476a", (kernel_ulong_t)&ad7466_chip_info },
427 { "ad7477", (kernel_ulong_t)&ad7467_chip_info },
428 { "ad7477a", (kernel_ulong_t)&ad7467_chip_info },
429 { "ad7478", (kernel_ulong_t)&ad7468_chip_info },
430 { "ad7478a", (kernel_ulong_t)&ad7468_chip_info },
431 { "ad7495", (kernel_ulong_t)&ad7495_chip_info },
432 { "ad7910", (kernel_ulong_t)&ad7467_chip_info },
433 { "ad7920", (kernel_ulong_t)&ad7466_chip_info },
434 { "ad7940", (kernel_ulong_t)&ad7940_chip_info },
435 { "adc081s", (kernel_ulong_t)&adc081s_chip_info },
436 { "adc101s", (kernel_ulong_t)&adc101s_chip_info },
437 { "adc121s", (kernel_ulong_t)&adc121s_chip_info },
438 { "ads7866", (kernel_ulong_t)&ads7866_chip_info },
439 { "ads7867", (kernel_ulong_t)&ads7867_chip_info },
440 { "ads7868", (kernel_ulong_t)&ads7868_chip_info },
441 { "bd79105", (kernel_ulong_t)&bd79105_chip_info },
442 /*
443 * The ROHM BU79100G is identical to the TI's ADS7866 from the software
444 * point of view. The binding document mandates the ADS7866 to be
445 * marked as a fallback for the BU79100G, but we still need the SPI ID
446 * here to make the module loading work.
447 */
448 { "bu79100g", (kernel_ulong_t)&ads7866_chip_info },
449 { "ltc2314-14", (kernel_ulong_t)<c2314_14_chip_info },
450 { }
451 };
452 MODULE_DEVICE_TABLE(spi, ad7476_id);
453
454 static struct spi_driver ad7476_driver = {
455 .driver = {
456 .name = "ad7476",
457 },
458 .probe = ad7476_probe,
459 .id_table = ad7476_id,
460 };
461 module_spi_driver(ad7476_driver);
462
463 MODULE_AUTHOR("Michael Hennerich <michael.hennerich@analog.com>");
464 MODULE_DESCRIPTION("Analog Devices AD7476 and similar 1-channel ADCs");
465 MODULE_LICENSE("GPL v2");
466