1import config.base 2 3import os 4 5class Configure(config.base.Configure): 6 def __init__(self, framework): 7 config.base.Configure.__init__(self, framework) 8 self.headerPrefix = 'PETSC' 9 return 10 11 def setupDependencies(self, framework): 12 config.base.Configure.setupDependencies(self, framework) 13 self.setCompilers = framework.require('config.setCompilers', self) 14 self.libraries = framework.require('config.libraries', self) 15 return 16 17 def configureCPURelax(self): 18 ''' Definitions for cpu relax assembly instructions ''' 19 # Definition for cpu_relax() 20 # From Linux documentation 21 # cpu_relax() call can lower power consumption or yield to a hyperthreaded 22 # twin processor; it also happens to serve as a compiler barrier 23 24 # x86 25 if self.checkCompile('', '__asm__ __volatile__("rep; nop" ::: "memory");'): 26 self.addDefine('CPU_RELAX()','__asm__ __volatile__("rep; nop" ::: "memory")') 27 return 28 # PowerPC 29 if self.checkCompile('','do { HMT_low; HMT_medium; __asm__ __volatile__ ("":::"memory"); } while (0)'): 30 self.addDefine('CPU_RELAX()','do { HMT_low; HMT_medium; __asm__ __volatile__ ("":::"memory"); } while (0)') 31 return 32 elif self.checkCompile('','__asm__ __volatile__ ("":::"memory");'): 33 self.addDefine('CPU_RELAX()','__asm__ __volatile__ ("":::"memory")') 34 return 35 36 # The list is not exhaustive and may not compile on all systems. If you use these macros, 37 # you need to have a fallback when the macros are not defined. 38 def configureMemoryBarriers(self): 39 ''' Definitions for memory barrier instructions''' 40 # ---- Definitions for x86_64 ----- 41 # General Memory Barrier 42 if self.checkCompile('','__asm__ __volatile__ ("mfence":::"memory")'): 43 self.addDefine('MEMORY_BARRIER()','__asm__ __volatile__ ("mfence":::"memory")') 44 # Read Memory Barrier 45 if self.checkCompile('','__asm__ __volatile__ ("lfence":::"memory")'): 46 self.addDefine('READ_MEMORY_BARRIER()','__asm__ __volatile__ ("lfence":::"memory")') 47 # Write Memory Barrier 48 if self.checkCompile('','__asm__ __volatile__ ("sfence":::"memory")'): 49 self.addDefine('WRITE_MEMORY_BARRIER()','__asm__ __volatile__ ("sfence":::"memory")') 50 51 # ---- Definitions for PowerPC ----- 52 # General Memory Barrier 53 if self.checkCompile('','__asm__ __volatile__ ("sync":::"memory")'): 54 self.addDefine('MEMORY_BARRIER()','__asm__ __volatile__ ("sync":::"memory")') 55 # Read Memory Barrier 56 if self.checkCompile('','__asm__ __volatile__ ("lwsync":::"memory")'): 57 self.addDefine('READ_MEMORY_BARRIER()','__asm__ __volatile__ ("lwsync":::"memory")') 58 # Write Memory Barrier 59 if self.checkCompile('','__asm__ __volatile__ ("eieio":::"memory")'): 60 self.addDefine('WRITE_MEMORY_BARRIER()','__asm__ __volatile__ ("eieio":::"memory")') 61 62 # ---- Definitions for ARM v7 ----- 63 # Use dmb for all memory barrier types 64 if self.checkCompile('','__asm__ __volatile__ ("dmb":::"memory")'): 65 self.addDefine('MEMORY_BARRIER()','__asm__ __volatile__ ("dmb":::"memory")') 66 self.addDefine('READ_MEMORY_BARRIER()','__asm__ __volatile__ ("dmb":::"memory")') 67 self.addDefine('WRITE_MEMORY_BARRIER()','__asm__ __volatile__ ("dmb":::"memory")') 68 69 # ---- Definitions for ARM v8 ----- 70 # Ref: http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.den0024a/CEGDBEJE.html 71 # Ref: http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.den0024a/CHDGACJD.html 72 # Use "Inner shareable", which makes sense for PETSc. 73 # General Memory Barrier 74 if self.checkCompile('','__asm__ __volatile__ ("dmb ish":::"memory")'): 75 self.addDefine('MEMORY_BARRIER()','__asm__ __volatile__ ("dmb ish":::"memory")') 76 # Read Memory Barrier 77 if self.checkCompile('','__asm__ __volatile__ ("dmb ishld":::"memory")'): 78 self.addDefine('READ_MEMORY_BARRIER()','__asm__ __volatile__ ("dmb ishld":::"memory")') 79 # Write Memory Barrier 80 if self.checkCompile('','__asm__ __volatile__ ("dmb ishst":::"memory")'): 81 self.addDefine('WRITE_MEMORY_BARRIER()','__asm__ __volatile__ ("dmb ishst":::"memory")') 82 return 83 84 def configure(self): 85 # These are not currently used in PETSc 86 # self.executeTest(self.configureCPURelax) 87 # self.executeTest(self.configureMemoryBarriers) 88 return 89